madeKYLIE

Hello,

I am a CIS Engineer & Web Developer

I am here in New Zealand with a post-study visa and I am looking for a job. I have five years experience as a CIS (CMOS Image Sensor – mobile cameras) Senior Engineer. I designed hardware functions with RTL language (verilog & HDL).

New Challenge for ME

My new challenge is web development. Although I am beginning in the web field, I believe my experience as a hardware design engineer is an advantage. In particular, I have an advanced understanding of programming languages such as PHP and javascript. I am a hard worker and am prepared to meet the speed and diversity required for web development projects.

A bit about ME

I have a cheerful personality and enjoy communicating with people. My hobbies are cooking and scuba diving. I am very happy to make dishes for my friends or family and to have fun together.

- Learn more about my Cooking
- Learn more about my Scuba Diving

Skills

HardWare

2016 ~ 2015	CIS Digital Design Part (for CMOS Image Sensor) ___Senior Research Engineer (STUDY for OFFSET) - Offset measurement as Temperature, Gain, Power for suitable dark offset (8M CIS FSI) - BLC Digital design (Random data generator for reducing noise; fixed pattern) - Verilog simulation of CIS timing generator - Static timing analysis using Prime time - FPGA module TEST
2014	CIS Digital Design Part (for CMOS Image Sensor) ___Senior Research Engineer (2M COMPACT CIS FSI) - BLC Digital design - Verilog simulation of CIS timing generator - Static timing analysis using Prime time - FPGA module TEST (13M CIS FSI) - BLC Digital design - Verilog simulation of CIS timing generator - Static timing analysis using Prime time - FPGA module TEST
2013	CIS Digital Design Part (for CMOS Image Sensor) __Juior Research Engineer (13M STACK CIS TEST) - BLC Digital design - Verilog simulation of CIS timing generator - Static timing analysis using Prime time (2M CIS FSI & BSI) - BLC Digital design - Verilog simulation of CIS timing generator - Static timing analysis using Prime time - FPGA module TEST
2012	CIS Digital Design Part (for CMOS Image Sensor) __Juior Research Engineer (3M CIS FSI) - Verilog simulation of CIS timing generator - Static timing analysis using Prime time
2012	CIS Digital Design Part (for CMOS Image Sensor) _Research Engineer - Verilog design & simulation of timing generator: X_RAY, ENCODER - 64-bit 3-wire Serial interface module - Clock divider module (1/12, 1/24, 1/48, 1/96) - LCC & CLCC & QFN Package in Board TEST & Debugging
2011	CIS Digital Design Part (for CMOS Image Sensor) _Research Engineer - FPGA module TEST - Verilog design & simulation of CIS timing generator: SVGA(WDR), SXGA(VISP,WDR(2)) - Synthesis using Design-Compiler & Timing simulation - Static timing analysis using Prime time - Verilog design & simulation of CIS timing generator: VGA(VISP,WDR) - 32-bit 3-wire Serial interface module - Clock divider module (1/2, 1/4, 1/8, 1/16) - LCC Package in Board TEST & Debugging

SoftWare (Training)

Jul ~ Oct 2017	Mini Documentary & Final Portfolio Music Video - Applying various video editing techniques and effects - Using Adobe Premiere Web CV - Designed & Developed "madeKYLIE"
Apr ~ Jun 2017	Adding Narratives to web page & JS Programming Animation - Creating story & charaters - Using Adobe Flash Website - Website designed & developed - Using Jquery, JS, HTML, CSS
Jan ~ Mar 2017	Network Communication & Web portfolio Database Access / MySQL - Network and data management systems Web portfolio - Website designed & developed - Using Adobe Dreamweaver
Nov 2016	HTML / CSS Programming - HTML5 / CSS3 - Website designed & developed using HTML5 / CSS3
Sep ~ Oct 2016	Creation to web page & PHP Programming Flash - Flash Animation - Using Adobe Flash Programming - Backend using PHP
Jul ~ Aug 2016	Graphic Design & Building Client Website Photoshop - Made Ecard, Magazine cover, Mobile Application Design, Website Design - Using Adobe Photoshop QB electrical company - Made one page responsive website - Using Bootstrap